hal_spi_master_chip_select_timing_t Struct Reference

SPI master chip select configuration structure. More...

#include <hal_spi_master.h>

Data Fields
uint32_t	chip_select_setup_count
	SPI master chip select setup count setting. More...
uint32_t	chip_select_hold_count
	SPI master chip select hold count setting. More...
uint32_t	chip_select_idle_count
	SPI master chip select idle count setting. More...

Detailed Description

SPI master chip select configuration structure.

Field Documentation

uint32_t chip_select_hold_count

SPI master chip select hold count setting.

The unit is in SPI base clock. The range is from 0 to 32767. The chip select hold time is (cs_hold_count+1)*CLK_PERIOD.

uint32_t chip_select_idle_count

SPI master chip select idle count setting.

The unit is in SPI base clock. The range is from 0 to 255. The chip select idle time between consecutive transaction is (cs_idle_count+1)*CLK_PERIOD.

uint32_t chip_select_setup_count

SPI master chip select setup count setting.

The unit is in SPI base clock. The range is from 0 to 32767. The chip select setup time is (cs_setup_count+1)*CLK_PERIOD, where CLK_PERIOD is the cycle time of the clock the SPI engine adopts.

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The documentation for this struct was generated from the following file:

• driver/chip/inc/hal_spi_master.h