Enum

Overview

Enumerations
enum	hal_spi_master_byte_order_t {   HAL_SPI_MASTER_LITTLE_ENDIAN = 0,   HAL_SPI_MASTER_BIG_ENDIAN = 1 }
	SPI master data transfer byte order definition. More...
enum	hal_spi_master_chip_select_polarity_t {   HAL_SPI_MASTER_CHIP_SELECT_LOW = 0,   HAL_SPI_MASTER_CHIP_SELECT_HIGH = 1 }
	SPI master chip select polarity definition. More...
enum	hal_spi_master_get_tick_mode_t {   HAL_SPI_MASTER_NO_GET_TICK_MODE = 0,   HAL_SPI_MASTER_GET_TICK_DELAY1 = 1,   HAL_SPI_MASTER_GET_TICK_DELAY2 = 2,   HAL_SPI_MASTER_GET_TICK_DELAY3 = 3,   HAL_SPI_MASTER_GET_TICK_DELAY4 = 4,   HAL_SPI_MASTER_GET_TICK_DELAY5 = 5,   HAL_SPI_MASTER_GET_TICK_DELAY6 = 6,   HAL_SPI_MASTER_GET_TICK_DELAY7 = 7 }
	SPI master tolerance get_tick timing (based on SPI system clock) setting. More...
enum	hal_spi_master_sample_select_t {   HAL_SPI_MASTER_SAMPLE_POSITIVE = 0,   HAL_SPI_MASTER_SAMPLE_NEGATIVE = 1 }
	SPI master sample edge of MISO definition. More...
enum	hal_spi_master_deassert_t {   HAL_SPI_MASTER_DEASSERT_DISABLE = 0,   HAL_SPI_MASTER_DEASSERT_ENABLE = 1 }
	SPI master chip select deasert definition. More...
enum	hal_spi_master_macro_select_t {   HAL_SPI_MASTER_MACRO_GROUP_A = 0,   HAL_SPI_MASTER_MACRO_GROUP_B = 1,   HAL_SPI_MASTER_MACRO_GROUP_C = 2 }
	SPI master pad macro select definition. More...
enum	hal_spi_master_callback_event_t {   HAL_SPI_MASTER_EVENT_SEND_FINISHED = 0,   HAL_SPI_MASTER_EVENT_RECEIVE_FINISHED = 1 }
	SPI master callback event definition. More...
enum	hal_spi_master_status_t {   HAL_SPI_MASTER_STATUS_ERROR = -4,   HAL_SPI_MASTER_STATUS_ERROR_BUSY = -3,   HAL_SPI_MASTER_STATUS_ERROR_PORT = -2,   HAL_SPI_MASTER_STATUS_INVALID_PARAMETER = -1,   HAL_SPI_MASTER_STATUS_OK = 0 }
	SPI master status. More...
enum	hal_spi_master_running_status_t {   HAL_SPI_MASTER_BUSY = 0,   HAL_SPI_MASTER_IDLE = 1 }
	SPI master running status. More...
enum	hal_spi_master_port_t {   HAL_SPI_MASTER_0 = 0,   HAL_SPI_MASTER_1 = 1,   HAL_SPI_MASTER_2 = 2,   HAL_SPI_MASTER_3 = 3,   HAL_SPI_MASTER_MAX }
	This enum defines the SPI master port. More...
enum	hal_spi_master_slave_port_t {   HAL_SPI_MASTER_SLAVE_0 = 0,   HAL_SPI_MASTER_SLAVE_1 = 1,   HAL_SPI_MASTER_SLAVE_MAX }
	This enum defines the options to connect the SPI slave device to the SPI master's CS pins. More...
enum	hal_spi_master_clock_polarity_t {   HAL_SPI_MASTER_CLOCK_POLARITY0 = 0,   HAL_SPI_MASTER_CLOCK_POLARITY1 = 1 }
	SPI master clock polarity definition. More...
enum	hal_spi_master_clock_phase_t {   HAL_SPI_MASTER_CLOCK_PHASE0 = 0,   HAL_SPI_MASTER_CLOCK_PHASE1 = 1 }
	SPI master clock format definition. More...
enum	hal_spi_master_bit_order_t {   HAL_SPI_MASTER_LSB_FIRST = 0,   HAL_SPI_MASTER_MSB_FIRST = 1 }
	SPI master transaction bit order definition. More...

Enumeration Type Documentation

enum hal_spi_master_bit_order_t

SPI master transaction bit order definition.

Enumerator
HAL_SPI_MASTER_LSB_FIRST	Both send and receive data transfer LSB first.
HAL_SPI_MASTER_MSB_FIRST	Both send and receive data transfer MSB first.

enum hal_spi_master_byte_order_t

SPI master data transfer byte order definition.

Before calling hal_spi_master_send_polling() or hal_spi_master_send_and_receive_polling(), user should make sure the byte_order parameter defined in hal_spi_master_advanced_config_t structure and configured through hal_spi_master_set_advanced_config() is HAL_SPI_MASTER_LITTLE_ENDIAN, because setting as HAL_SPI_MASTER_BIG_ENDIAN has no effect in send direction, but has effect in receive direction.

Enumerator
HAL_SPI_MASTER_LITTLE_ENDIAN	Both send and receive data use Little-Endian format.
HAL_SPI_MASTER_BIG_ENDIAN	Both send and receive data use Big-Endian format.

enum hal_spi_master_callback_event_t

SPI master callback event definition.

Enumerator
HAL_SPI_MASTER_EVENT_SEND_FINISHED	SPI master send operation completed.
HAL_SPI_MASTER_EVENT_RECEIVE_FINISHED	SPI master receive operation completed.

enum hal_spi_master_chip_select_polarity_t

SPI master chip select polarity definition.

Enumerator
HAL_SPI_MASTER_CHIP_SELECT_LOW	Chip select polarity active low.
HAL_SPI_MASTER_CHIP_SELECT_HIGH	Chip select polarity active high.

enum hal_spi_master_clock_phase_t

SPI master clock format definition.

Enumerator
HAL_SPI_MASTER_CLOCK_PHASE0	Clock format is 0.
HAL_SPI_MASTER_CLOCK_PHASE1	Clock format is 1.

enum hal_spi_master_clock_polarity_t

SPI master clock polarity definition.

Enumerator
HAL_SPI_MASTER_CLOCK_POLARITY0	Clock polarity is 0.
HAL_SPI_MASTER_CLOCK_POLARITY1	Clock polarity is 1.

enum hal_spi_master_deassert_t

SPI master chip select deasert definition.

Enumerator
HAL_SPI_MASTER_DEASSERT_DISABLE	Chip select deassert is disabled.
HAL_SPI_MASTER_DEASSERT_ENABLE	Chip select deassert is enabled.

enum hal_spi_master_get_tick_mode_t

SPI master tolerance get_tick timing (based on SPI system clock) setting.

Enumerator
HAL_SPI_MASTER_NO_GET_TICK_MODE	Timing tolerance ability not used.
HAL_SPI_MASTER_GET_TICK_DELAY1	Delay 1 SPI system clock cycle for get_tick.
HAL_SPI_MASTER_GET_TICK_DELAY2	Delay 2 SPI system clock cycles for get_tick.
HAL_SPI_MASTER_GET_TICK_DELAY3	Delay 3 SPI system clock cycles for get_tick.
HAL_SPI_MASTER_GET_TICK_DELAY4	Delay 4 SPI system clock cycles for get_tick.
HAL_SPI_MASTER_GET_TICK_DELAY5	Delay 5 SPI system clock cycles for get_tick.
HAL_SPI_MASTER_GET_TICK_DELAY6	Delay 6 SPI system clock cycles for get_tick.
HAL_SPI_MASTER_GET_TICK_DELAY7	Delay 7 SPI system clock cycles for get_tick.

enum hal_spi_master_macro_select_t

SPI master pad macro select definition.

Enumerator
HAL_SPI_MASTER_MACRO_GROUP_A	SPI use PAD group A.
HAL_SPI_MASTER_MACRO_GROUP_B	SPI use PAD group B.
HAL_SPI_MASTER_MACRO_GROUP_C	SPI use PAD group C.

enum hal_spi_master_port_t

This enum defines the SPI master port.

The chip supports total of 4 SPI master ports, each of them supports polling mode and DMA mode. For more details about polling mode and DMA mode, please refer to Supported features.

Enumerator
HAL_SPI_MASTER_0	SPI master port 0.
HAL_SPI_MASTER_1	SPI master port 1.
HAL_SPI_MASTER_2	SPI master port 2.
HAL_SPI_MASTER_3	SPI master port 3.
HAL_SPI_MASTER_MAX	The total number of SPI master ports (invalid SPI master port).

enum hal_spi_master_running_status_t

SPI master running status.

Enumerator
HAL_SPI_MASTER_BUSY	SPI master is busy.
HAL_SPI_MASTER_IDLE	SPI master is idle.

enum hal_spi_master_sample_select_t

SPI master sample edge of MISO definition.

Enumerator
HAL_SPI_MASTER_SAMPLE_POSITIVE	Sample edge of MISO is at the positive edge.
HAL_SPI_MASTER_SAMPLE_NEGATIVE	Sample edge of MISO is at the negative edge.

enum hal_spi_master_slave_port_t

This enum defines the options to connect the SPI slave device to the SPI master's CS pins.

Enumerator
HAL_SPI_MASTER_SLAVE_0	The SPI slave device is connected to the SPI master's CS0 pin.
HAL_SPI_MASTER_SLAVE_1	The SPI slave device is connected to the SPI master's CS1 pin.
HAL_SPI_MASTER_SLAVE_MAX	The total number of SPI master CS pins (invalid SPI master CS pin).

enum hal_spi_master_status_t

SPI master status.

Enumerator
HAL_SPI_MASTER_STATUS_ERROR	SPI master function error occurred.
HAL_SPI_MASTER_STATUS_ERROR_BUSY	SPI master is busy.
HAL_SPI_MASTER_STATUS_ERROR_PORT	SPI master invalid port.
HAL_SPI_MASTER_STATUS_INVALID_PARAMETER	SPI master invalid input parameter.
HAL_SPI_MASTER_STATUS_OK	SPI master operation completed successfully.